The invention is in the field of digital circuits that control the operations of flip-flops.
Digital systems such as processors which employ flip-flops for signal processing or storage are characterized in having a hold operation during which the flip-flops are prevented from transferring stored data for one or more clock periods. For example, in a microcomputer system a typical NOP command requires digital circuitry including flip-flops to skip one or more system clock cycles and to perform no processing during the skipped cycles. the obverse of the hold operation is called the pass operation. During the pass operation, the flip-flops are permitted to accept and forward data. Frequently, these operations are referred to jointly as hold/pass.
In other digital equipments, which are used to conduct diagnostic testing of digital systems including sequentially connected flip-flops, a set-scan operation is implemented by propagating a data signal through the sequence of flip-flops. In this operation, each flip-flop is prevented from obtaining data from any source except another flip-flop preceding it in the sequence, thereby permitting a predetermined test data pattern to be shifted through the flip-flop sequence.
A conventional approach for selectively implementing the shift and hold/pass operations is illustrated in FIG. 1. The FIG. 1 circuit illustrates the control of a single flip-flop, but it can be generalized to control any number of associated flip-flops which are driven by a common CLOCK signal. In the FIG. 1 circuit, the input port D of a conventional storage flip-flop 10 is connected to receive the output of a four-line to one-line multiplexer 12. The output port Q of the flip-flop 10 is connected to one input of another multiplexer 14. The flip-flop 10 responds conventionally to a CLOCK signal by storing data present at port D during a transition of the CLOCK signal. In a typical data storage (pass) operation, a pair of control signals (SHIFT and HOLD/PASS) that are applied to the select ports S.sub.1 and S.sub.2 of the multiplexers 12 and 14, assume a state permitting data to pass from the input ports I.sub.0 of the multiplexers to their output ports Y. This permits a DATA signal from a respective source to be applied directly to the D port of the flip-flop 10. Simultaneously, data stored during the previous storage transition of the CLOCK signal is provided at port Q of the flip-flop 10.
In the shift operation, corresponding to another respective state of the SHIFT and HOLD/PASS signals, data is transferred by the multiplexers 12 and 14 from their I.sub.1 to their Y ports. If the I.sub.1 port of each multiplexer is connected to the output port Q of an associated flip-flop, then a number of flip-flops can be serially connected to sequentially shift data with every storage transition of the CLOCK signal.
Finally, if a hold operation is selected by a third respective state of the SHIFT and HOLD/PASS signals, the output of each flip-flop will be connected to its input through its associated multiplexer. For example, when the hold state is selected, the multiplexer 12 will conduct a signal presented at port I.sub.2 to port Y whence it will be conducted to port D of the flip-flop 10. Since port Q of the flip-flop 10 is connected to port I.sub.2 of the multiplexer 12, the signal currently stored in the flip-flop 10 will be circulated back to its input port with the next storage transition of the CLOCK signal, effectively retaining the data in the flip-flop 10. In systems not requiring a shift operation, the hold and pass operations can be implemented by connecting port Y of a two-port to one-port multiplexer, controlled by the HOLD/PASS signal, to port Q of each flip-flop to be controlled.
It should be evident that the circuitry of FIG. 1 which controls the hold, pass, and shift operations of the flip-flop 10 requires the use of a multiplexer 12 for each flip-flop to be controlled. Since the number of input ports commonly provided in conventional multiplexers is a multiple of 2, it is evident that one port of each multiplexer is wasted when the three functions are implemented. Moreover, in the case where only the hold and pass functions are desired, each flip-flop must still have an associated two-port multiplexer. In either case, the excessive number of multiplexers consumes a great deal of silicon area in an integrated circuit, increases power consumption of the total circuit, and increases the difficulty of interconnecting the controlled series of flip-flops with each other and with respective data sources.